In high-voltage bidirectional current-sensing applications, engineers often face the design dilemma of common-mode voltages far exceeding the supply voltage. With its industry-leading wide common-mode range of -2V to 80V, the INA299 has become the preferred choice for automotive electronics, industrial power supplies, and energy storage systems. However, whether the parameter advantages listed in the datasheet can be fully realized on the PCB often depends on five frequently overlooked layout details. Based on real-world measurement cases, this article dissects the complete signal chain optimization strategy from the shunt resistor to the ADC interface.
Wide Common-Mode Architecture Principles and Core Advantages of the INA299
The INA299 utilizes a proprietary zero-drift architecture, generating a floating supply rail higher than the common-mode voltage via an internal charge pump, allowing the input stage to operate stably across the entire -2V to 80V range. This topology breaks through the bottleneck of traditional current-sense amplifiers being limited by the supply voltage, providing a single-chip solution for high-voltage scenarios such as 48V mild hybrid systems and battery management systems (BMS).
How the Internal Topology Achieves a Beyond-Supply Common-Mode Range
The device's internal bootstrapped charge pump circuit generates a floating bias voltage of approximately 5 V, which is superimposed on the input common-mode voltage to provide a stable bias condition for the input differential pair. This design allows the input stage to maintain a linear operating region even when the common-mode voltage drops as low as -2V (reverse-battery conditions) or rises as high as 80V (load-dump scenarios). Test results show that across the -40°C to 125°C temperature range, the typical common-mode rejection ratio (CMRR) remains above 120 dB.
Key Hardware Adaptation Points for 650-kHz Bandwidth and Bidirectional Sensing
The 650-kHz -3dB bandwidth enables accurate capture of fast transient currents, which is crucial for PWM current reconstruction in motor control. The bidirectional sensing function sets the zero point via an external reference voltage (REF), with the output swing ranging from VREF ± VSENSE × Gain. During design, it is essential to ensure that the noise on the REF pin is below 100 μVpp to avoid introducing false polarity decisions near the zero point.
| Performance Parameter | Traditional Current-Sense Amplifier | INA299 Solution | Design Benefits & Advantages |
|---|---|---|---|
| Common-Mode Operating Voltage (Vcm) | 0V to 36V (Limited) | -2V to 80V (Wide Common-Mode) | Supports reverse-battery protection and high-voltage load dump |
| Common-Mode Rejection Ratio (CMRR) | 80 dB to 100 dB | 120 dB (Typical) | Extremely high suppression of high-frequency switching noise, ensuring sampling accuracy |
| Signal Bandwidth (-3dB) | 100 kHz to 300 kHz | 650 kHz | Supports high-frequency PWM sampling and real-time short-circuit protection |
| Offset Voltage Drift | 0.5 µV/°C | 0.1 µV/°C (Zero-Drift) | Maintains high precision across the entire temperature range without software calibration |
Shunt Resistor Layout: A Double Play of Precision and Thermal Management
The shunt resistor is the first gate in the current-sensing signal chain, and its layout quality directly determines the upper limit of system accuracy. The INA299 supports a full-scale sense voltage of 10 μV to 100 mV; a 10-mΩ resistor with 1% accuracy will generate 1 W of power dissipation at a 10-A current.
Four-Wire Routing Specifications for Kelvin Connections
A four-wire Kelvin connection must be enforced, physically separating the current path from the sense path at the resistor pads. Compute the current trace width based on 1-oz copper thickness and a 10°C temperature rise, and keep the sense trace width at no less than 0.2 mm to minimize thermocouple effects. Test data indicates that non-Kelvin connections can introduce an additional offset of 50 μV to 200 μV, which, at a gain of 10, equates to a full-scale error of 0.5% to 2%.
Thermal Coupling and Compensation Design in High-Power Scenarios
The temperature rise of the shunt resistor conducts through the copper foil to the INA299 package, causing input offset voltage drift. The following measures are recommended: maintain a spacing of ≥ 5 mm between the resistor and the IC; place a thermal isolation slot between them; and select manganin or constantan resistors with a low TCR (±50 ppm/°C). For applications with continuous currents > 5 A, consider using four-terminal metal foil resistors combined with forced-air cooling.
Ground Plane Splitting Strategy: The Key to Suppressing Common-Mode Noise
Ground plane design is the core conflict in wide common-mode systems—requiring both a low-impedance return path for high-frequency signals and preventing power ground noise from coupling into sensitive analog circuits.
Single-Point Connection Scheme for Analog and Power Grounds
Set up an independent analog ground island (AGND) beneath the INA299, connected to the power ground (PGND) at a single point near the power entry. This connection point should be located at the ground terminal of the main supply filter capacitor, forming a "star" ground structure. Avoid switching heavy current loads near the ADC sampling instances to prevent ground-bounce noise from injecting into the analog ground through the single-point connection.
Stackup Optimization for Minimizing Ground Loop Area
Recommended four-layer PCB stackup: Top layer (signals + shunt resistor), Ground layer, Power layer, Bottom layer (signals). The INA299 and its associated RC filter network are placed on the top layer, with the ground layer directly beneath remaining completely solid and undivided. The output signal trace to the ADC should be routed alongside a ground via array, controlling the loop area to within 10 mm². Test results show that the optimized layout can improve high-frequency common-mode noise suppression by more than 15 dB.
High-Frequency Signal Integrity: Link Design from Amplifier to ADC
The rail-to-rail output of the INA299 can drive most SAR ADCs, but a 650-kHz bandwidth means there is a lack of suppression for noise above the Nyquist frequency, requiring filtering space to be reserved during the layout phase.
Matching Output Filtering with Sample-and-Hold Circuits
Configure an RC low-pass filter between the OUT pin and the ADC input, with the cutoff frequency set to 1/5 to 1/10 of the ADC sampling rate. For a 1-MSPS ADC, a combination of R = 100 Ω and C = 1 nF is recommended (fc ≈ 1.6 MHz). Place the filter resistor close to the INA299 and the capacitor close to the ADC, forming a "pi" type distribution to isolate high-frequency noise from both sides.
Differential Routing Rules for Long-Distance Transmission
When the distance between the INA299 and the ADC exceeds 100 mm, it is recommended to use differential transmission lines or add an intermediate buffer stage. Under single-ended routing conditions, maintain a 3W spacing (where W is the trace width) from adjacent signal lines, and place ground guard traces on both sides. Avoid routing the output trace across plane splits to prevent impedance discontinuities caused by discontinuous return paths.
Power Decoupling and Ensuring Reference Voltage Stability
The power supply rejection ratio (PSRR) of the INA299 is better than 100 dB in the DC to 10 kHz range, but insufficient high-frequency decoupling can still introduce noise modulation through the output terminal.
Decoupling Capacitor Configuration in Multi-Power Domain Systems
Configure the VCC pin with a 0.1-μF ceramic capacitor (X7R, 0603) in parallel with a 10-μF tantalum capacitor, with the former placed < 3 mm from the pin to suppress high-frequency noise and the latter providing transient current reserves. For applications with VSPIKE > 40 V, add a TVS diode and an RC snubber network at the power entry, allowing clamping energy to discharge to the power ground via an independent path.
Noise Isolation for the REF Pin Bias Network
The REF pin voltage determines the zero-point position of bidirectional sensing, and its noise directly impacts small-signal resolution. It is recommended to supply it using a low-noise LDO or a precision voltage divider (1% accuracy, drift < 100 ppm/°C), and place a 10-nF decoupling capacitor as close to the REF pin as possible. Avoid routing the REF trace parallel to switching power supply inductors or motor drive lines, isolating it with shielded ground traces if necessary.
Typical Troubleshooting and Empirical Verification Methods
Even if the above layout principles are followed, the actual system may still experience anomalies due to parasitic parameters or EMI interference. Establishing a systematic diagnostic workflow can significantly shorten debugging cycles.
Diagnostic Workflow for Abnormal Common-Mode Step Responses
When the common-mode voltage changes rapidly (such as during load-dump testing), if ringing or a DC offset occurs at the output, troubleshoot in sequence: the time constant matching of the input RC filter network (recommended to be < 10 μs); common-mode current path anomalies caused by ground plane splitting; and excessive ESR of the power supply decoupling capacitors. Use the AC coupling mode of an oscilloscope to observe the output; a normal response should settle to within 1% of the final value within 50 μs.
Simple Schemes for Electromagnetic Compatibility Pre-Testing
Before formal EMC certification, near-field probes (H-field/E-field) can be used to scan the PCB surface and locate high-frequency radiation hot spots. Areas of key focus: current path layer transitions at the shunt resistor; the via array of the INA299 power supply pins; and the ground return loop of the output filter capacitor. For frequency points exceeding radiation standards, targeted addition of shielding covers or optimizing return paths typically reduces radiated emissions by more than 10 dBμV/m.
Key Summary of Design Implementation
- The four-wire Kelvin connection is the foundation for eliminating the impact of shunt resistor contact resistance; the sense traces must be strictly separated from the power path.
- Single-point star grounding between the analog ground and power ground, combined with a solid ground plane, can improve common-mode noise suppression to over 120 dB.
- The cutoff frequency of the output RC filter should match the ADC sampling rate, and component layout should follow the "near source, near load" principle.
- The REF pin requires an independent, low-noise supply, with a 10-nF decoupling capacitor mounted directly on the pin pad.
- Reserving test points and performing near-field probe scans are necessary means to verify layout effectiveness; completing EMC pre-testing before mass production is highly recommended.
Frequently Asked Questions
Can the INA299 detect negative currents? How is accuracy guaranteed?
Yes. The zero point is set via an external REF voltage; when VREF = Vs/2, a symmetrical ± bidirectional range is achieved. Guaranteeing accuracy relies on the low-noise design of the REF network—using a precision voltage divider or a dedicated reference source is recommended, and the REF decoupling capacitor should be placed tightly against the pin in the layout to avoid noise coupling from long traces.
What are the PCB layer count requirements for a wide common-mode range?
A four-layer board structure is recommended. The top layer routes the INA299 and signal chain, the ground layer provides a solid return plane, the power layer handles multiple voltage distributions, and the bottom layer hosts secondary signals. For a two-layer board scheme, special care is required: pour a solid copper area beneath the INA299 as a local ground, connecting it to the main ground plane through dense vias to maintain high-frequency signal integrity.
How to verify if the common-mode rejection ratio meets the nominal value?
Build a test circuit: Apply a fixed differential input voltage (e.g., 10 mV), sweep the common-mode voltage (-2V to 80V) at a slope of 100 V/μs, and monitor the output voltage change. Calculate CMRR = 20 × log10(ΔVCM / ΔVOUT). If the measured value is below 100 dB, focus on checking the symmetry of the input traces, the integrity of the ground plane, and the quality of power supply decoupling.
How exactly does a four-wire Kelvin connection suppress measurement errors?
By physically separating the sense traces and the main current traces at the shunt resistor pads, additional voltage drops introduced by copper foil resistance and solder contact resistance are eliminated. This prevents large currents from flowing through the fragile INA299 inputs, fundamentally eliminating up to hundreds of microvolts of additional offset voltage, ensuring full-scale sampling accuracy of the system.
